Acoustic-Camera
jduanen
Low-cost, High-performance, Acoustic Camera
Components (10)
| Reference | Value | Description |
|---|---|---|
| U109 | ALINX AC7200 (XC7A200T-2FBG484I) | ALINX AC7200 XC7A200T-2FBG484I Artix-7 FPGA SOM, 45x55mm, 4x 80-pin/0.5mm B2B connectors (Unit A=CON1 VCCIN/GND+BANK34+BANK13+XADC, Unit B=CON2 BANK13+BANK14, Unit C=CON3 BANK15+BANK16+JTAG (TCK/TDI/TDO/TMS on pins 77-80 -- a SEPARATE on-module 6-pin JTAG header J1 also exists, not modeled here), Unit D=CON4 BANK16+GTP transceivers). Every pin cross-checked against ALINX's own real user manual (docs/AC7200_User_Manual.pdf) -- CON2/CON3/CON4 and CON1 pins 1-72 matched an earlier web-transcription exactly; CON1 pins 73-80 (previously unverified placeholder) now filled in from the real manual. ONE correction applied: CON1 pin 27 is printed as 'B13_L7_P' in ALINX's own manual (same as pin 25) -- a real duplicate/typo in their document (different FPGA balls AB11 vs AB12, and every other one of the 320 pins alternates P/N without exception) -- corrected here to B13_L7_N. Module standalone-power (J3, 2-pin +5V/GND) and JTAG (J1, 6-pin) headers exist on the module but are not part of this symbol (carrier-board-facing CON1-4 only). |
| U111 | TLV62569DBV | High Efficiency Synchronous Buck Converter, Adjustable Output 0.6V-5.5V, 2A, SOT-23-5 |
| C102 | 4.7uF | Unpolarized capacitor |
| C103 | 10uF | Unpolarized capacitor |
| C104 | 100uF | Unpolarized capacitor |
| J2 | AXK5S80137YG | Panasonic AXK580137YG -- P5K series 0.5mm-pitch 80-pin board-to-board SOCKET, module side (confirmed on the ALINX AC7200 module; mates with the carrier board's own AXK680337YG header -- see ../../AC7200/AC7200_README.md). Real dimensions from Panasonic/Mouser's own P5K/P5KS catalog PDF (mouser.com/catalog/specsheets/AXK.pdf), read directly: body 23.20 x 19.50mm (A x B, same as the header), 0.5mm pitch, 40 pins/row x 2 rows staggered by 0.25mm (half pitch), pad 0.25 x 0.75mm, total footprint span 6.80mm (wider than the header's 5.60mm -- read directly off the Socket's own land-pattern drawing, not assumed equal to the header). Part number CONFIRMED, not assumed: the AC7200 module's own STEP model (AC7200.3.0.stp) names this connector 'AXK680137YG', which doesn't decode against Panasonic's real P5K part-number table (leading digit 6 = Header selector, but mated-height digit 1 is documented Socket-only) -- flagged as a likely STEP-model typo when this part was first built. ALINX's own real schematic (docs/AC7200_Schematic.pdf, page 12 'AC7200 CONNECTOR') settles it: all 4 connector reference labels explicitly read 'AXK580137YG', confirming the STEP model's name was wrong and this (leading digit 5) is the real part. All 320 CON1-4 signal-pin assignments in ../../AC7200/KiCad/AC7200.kicad_sym were also cross-checked pin-by-pin against that same real schematic -- exact match, no discrepancies. Pin numbering on THIS standalone connector symbol (1-80 sequential by row) is still an ASSUMED convention, matching the header's own same assumption -- the real schematic only labels FPGA bank/ball nets on CON1-4, not this connector's own physical pin-to-number layout, so it wasn't independently verifiable against a real pin-1 diagram in the catalog either. |
| J3 | Main Power Input | Generic connector, single row, 01x02, script generated (kicad-library-utils/schlib/autogen/connector/) |
| L1 | 2.2uH_2.4A_2016 | 2.2uH, Isat>2.4A, Imax>=1.8A, Rdc<=120mOhms, shielded |
| R14 | 499k | Resistor |
| R15 | 100k | Resistor |