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zhouyingjie-111
本作品以交错并联BUCK电路为例,融合AI技术,设计了一套包含需求获取、硬件选型、代码生成、PCB绘制四个方面的全流程电路设计方案,实现效率、体积、重量、成本等多目标的协同优化。
| Reference | Value | Description |
|---|---|---|
| Q1 | NMOS_HS1 | Phase 1 High Side MOSFET |
| Q2 | NMOS_LS1 | Phase 1 Low Side MOSFET |
| Q3 | NMOS_HS2 | Phase 2 High Side MOSFET |
| Q4 | NMOS_LS2 | Phase 2 Low Side MOSFET |
| U1 | LM358_DFN | Low-Power, Dual Operational Amplifiers, DFN-8 |
| U2 | AMC1200BDWV | Fully-differential isolated amplifier, ±250-mV input, fixed gain = 8, peak isolation voltage 4250V, transient immunity 10kV/us, UL1577/VDE V 0884-10 approved, SOIC-8 |
| U3,U4 |
| High and Low Side Driver, 600V, 210/360mA, PDIP-8/SOIC-8 |
| U5 | AMS1117-3.3 | 3.3V LDO |
|---|
| U6 | AMS1117-1.8 | 1.8V LDO |
|---|
| U7 | TMS320F28335PTPQ |
|---|
| C1 | 100uF | Input bulk capacitor |
|---|
| C2,C4,C6,C7,C9 | 10uF | 1.8V Output,Input Filter,Output bulk capacitor 2 |
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| C3,C5 | 1uF | Output bulk capacitor 2 |
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| C8 | 100nF | 3.3V Decoupling |
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| C10,C11 | 22pF | Crystal Load |
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| D1,D2 | D | Diode |
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| J1 | INPUT | Input Terminal |
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| J2 | OUTPUT | Output Terminal |
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| J3,J4 | Conn_01x02_Pin | Generic connector, single row, 01x02, script generated |
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| J5,J6 | Conn_01x01_Pin | Generic connector, single row, 01x01, script generated |
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| J7 | POWER_IN | 5V Power Input |
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| L1,L2 | 1uH | Phase 1 Inductor,Phase 2 Inductor |
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| R1,R3-R9 | 10k | Sampling resistor 1 |
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| R2 | 1k | Sampling resistor 2 |
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| R10-R13 | 10 | Sampling resistor 2 |
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| Y1 | 150MHz | 30MHz Crystal |
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